tlp718 2009-04-20 1 unit in mm weight:0.26 g (t y p .) 4.580.25 4.0 +0.25 ? 0.20 9.70.3 6.80.25 0.40.1 1.270.2 1.250.25 7.620.25 3.65 +0.15 ? 0.25 0.25 1 2 3 6 5 4 11-5j1 toshiba 11-5j1 ? 0.05 +0.10 toshiba photocoupler gaa ? as ired & photo-ic tlp718 isolated bus drivers high speed line receivers microprocessor system interfaces the toshiba tlp718 consists of a gaa ? as light-emitting diode and an integrated high-gain, high-s peed photodetector. this unit is a 6-pin sdip. the tlp718 is 50% smaller than the 8-pin dip and meets the reinforced insulation class requirements of international safety standards. therefore the mounting area can be reduced in equipment requir ing safety standard certification. the detector has a totem pole output st age to provide both source and sink driving. the detector ic has an intern al shield that provides a guaranteed common-mode transient immunity of 10 kv / s. the tlp718 is inverter logic type. for buffer logic type, the tlp715 is in line-up. z inverter logic type (totem pole output) z guaranteed performance over temperature : ? 40 to 100c z power supply voltage : 4.5 to 20 v z input current: i fhl = 3ma (max.) z switching time ( t phl / t plh) : 250 ns (max.) z common-mode transient immunity : 10 kv/ s (min) z isolation voltage : 5000 vrms (min) z ul recognized ul1577, file no.e67349 z c-ul recognized csa component acceptance service no. 5a, file no.e67349 z option (d4) tv recognized / vde under application : din en60747-5-2 maximum operati ng insulation voltage : 890v pk highest permissible over voltage : 8000v pk (note) : when a en60747-5-2 approved type is needed, please designate ?option(d4)? z construction mechanical rating 7.62 mm pitch standard type 10.16 mm pitch tlpxxxf type creepage distance clearance insulation thickness 7.0 mm (min) 7.0 mm (min) 0.4 mm (min) 8.0 mm (min) 8.0 mm (min) 0.4 mm (min) truth table input led tr1 tr2 output h on off on l l off on off h vcc gnd shield 1 3 4 5 6 2 1:anode 2:n.c. 3:cathode 4:gnd 5:vo (output) 6:vcc pin configuration (top view) 0.1 f bypass capacitor must be connected between pins 6 and 4. (note 5) schematic v cc v o gnd i cc i o 6 5 4 shield 3- 1+ i f vf tr1 tr2
tlp718 2009-04-20 2 absolute maximum ratings (ta = 25c) characteristic symbol rating unit forward current (ta 83 c) i f 20 ma forward current derating (ta 83 c) i f / ta ? 0.48 ma/ c peak transient forward current (note 1) i fpt 1 a reverse voltage v r 5 v led junction temperature tj 125 c output current 1 (ta 25 c) i o1 25 / ? 15 ma output current 2 (ta 100 c) i o2 13 / ? 13 ma output voltage v o ? 0.5 to 20 v supply voltage v cc ? 0.5 to 20 v detector junction temperature tj 125 c operating temperature range topr ? 40 to 100 c storage temperature range tstg ? 55 to 125 c lead solder temperature (10 s) tsol 260 c isolation voltage (ac,1 min., r.h. 60%, ta = 25 c) (note 2) bvs 5000 vrms note: using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operat ing temperature/current/voltage, etc. ) are within the absolute maximum ratings. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 1: pulse width pw 1us, 300pps. note 2: device considered a two terminal device : pi ns 1,2 and 3 short ed together and pins 4,5 and 6 shorted together. recommended operating conditions characteristic symbol min typ. max unit input current, on i f (on) 4.5 ? 10 ma input voltage, off v f (off) 0 ? 0.8 v supply voltage* v cc 4.5 ? 20 v operating temperature t opr -40 ? 100 c * this item denotes operating ranges, not meaning of recommended operating conditions. note: recommended operating conditions are given as a design guideline to obtain expected performance of the device. additionally, each item is an independent guide line respectively. in developing designs using this product, please confirm specified characteristics shown in this document.
tlp718 2009-04-20 3 electrical characteristics (unless otherwise specified, ta = ? 40 to 100 c, v cc = 4.5 to 20 v.) characteristic symbol test circuit condition min typ. * max unit input forward voltage v f D i f = 5 ma , ta = 25 c 1.4 1.6 1.7 v temperature coefficient of forward voltage v f / ta D i f = 5 ma D ? 2.0 D mv/ c input reverse current i r D v r = 5 v , ta = 25 c D D 10 a input capacitance c t D v = 0 v, f = 1 mhz, ta = 25 c D 45 D pf logic low output voltage v ol 1 i ol = 3.5 ma , i f = 5 ma D 0.2 0.6 v v cc = 4.5 v 2.7 3.5 D logic high output voltage v oh (note3) 2 i oh = ? 2.6 ma, vf = 0.8 v v cc = 20 v 17.4 19 D v logic low supply current i ccl 3 i f = 5 ma D D 3.0 ma logic high supply current i cch 4 v f =0v D D 3.0 ma v cc = v o = 5.5 v 15 80 D logic low short circuit output current i osl 5 i f = 5 ma v cc = v o = 20 v 20 90 D ma v cc = 5.5 v ? 5 -15 D logic high short circuit output current (note4) i osh 6 v f = 0 v, v o = gnd v cc = 20 v ? 10 ? 20 D ma input current logic low output (note4) i fhl D i o = 3.5 ma, v o < 0.6 v D 0.4 3 ma input voltage logic high output v flh D i o = ? 2.6 ma, v o > 2.4v 0.8 D D v input current hysteresis i hys D v cc = 5 v D 0.05 D ma * all typical values are at ta=25 c, v cc =5 v unless otherwise specified note 3: v oh =v cc ?v o [ v ] note 4: duration of output short circuit time should not exceed 10 ms. note 5: a ceramic capacitor (0.1 a) should be connected from pin 6 to pi n 4 to stabilize the operation of the high gain linear amplifier. failure to provide the bypassing may impair the switching property. the total lead length between capacitor and coupler should not exceed 1 cm. isolation characteristics (ta = 25c) characteristic symbol test condition min typ. max unit capacitance input to output c s v = 0v, f = 1 mhz (note 2) D 1.0 D pf isolation resistance r s r.h. 60%, v s = 500 v (note 2) 110 12 10 14 D ? ac, 1 minute 5000 D D ac, 1 second, in oil D 10000 D v rms isolation voltage bv s dc, 1 minute, in oil D 10000 D vdc
tlp718 2009-04-20 4 switching characteristics (unless otherwise specified, ta = ? 40 to 100 c, v cc = 4.5 to 20 v) characteristic symbol test circuit condition min typ. * max unit propagation delay time to logic high output t plh i f = 3 0 ma 30 120 250 ns propagation delay time to logic low output t phl i f = 0 3 ma 30 120 250 ns switching time dispersion between on and off |t phl - t plh | D D D 220 ns rise time (10 ? 90 %) tr i f = 3 0 ma, v cc = 5 v D 30 D ns fall time (90 ? 10 %) tf 7,8 i f = 0 3 ma, v cc = 5 v D 30 D ns common-mode transient immunity at high level output cm h v cm = 1000 vp-p, i f = 0 ma, v cc = 20 v, ta = 25 c 10000 D D v/us common-mode transient immunity at low level output cm l 9 v cm = 1000 vp-p, i f = 5 ma, v cc = 20 v, ta = 25 c ? 10000 D D v/us *all typical values are at ta = 25 c. test circuit 1 : v ol test circuit 2 : v oh test circuit 3 : i ccl test circuit 4 : i cch test circuit 5 : i osl test circuit 6 : i osh i f vcc vcc gnd shield 0.1uf v ol 1 3 6 5 4 v i ol 2 i f vcc vcc gnd shield 0.1uf vo 1 3 6 5 4 i osl a 2 vcc vcc gnd shield 0.1uf v oh v i oh 1 3 6 5 4 2 v f vcc gnd shield 0.1uf vcc 1 3 6 5 4 i osh a vo 2 vcc vcc gnd shield i ccl a i f 1 6 3 5 4 2 0.1uf vcc gnd shield vcc i cch a 1 3 6 5 4 2 0.1uf v oh =v cc ?v o [ v ]
tlp718 2009-04-20 5 test circuit 7: switching time test circuit test circuit 8: switching time test circuit test circuit 9: common-mode transient immunity test circuit cm h (cm l ) is the maximum rate of rise (fall) of the common mode voltage that can be sustained with the output voltage in the high (low) state. )s( t r )v( h cm = 800 )s( t f )v( l cm ?= 800 cm l cm h v cm 90% 1000v ? sw a : i f =0ma ? sw b : i f =5ma 1v 17v vo tr tf 10% 0.1uf vo vcc 1 3 6 5 4 v cm b vcc gnd shield 2 sw a i f + - vo 0 . 1 u f vcc i f vcc gnd shield cl tp hl i f vo 50% v ol v oh tp lh t f tr 90% 10% 1.3v 1.3v 10% 90% vcc gnd shield vo 0.1uf cl vcc i f 5v 620 ? 5k ? tp hl i f 1.3v vo 50% vol v oh tp lh cl: stray capacitance of probe and wiring (to 15 pf) i f =3 ma(p.g) (f=50 khz , duty=50% less than tr = tf = 5ns) cl: stray capacitance of probe and wiring (to 15 pf) i f =3 ma(p.g) (f=50 khz , duty=50% less than tr = tf = 5ns)
tlp718 2009-04-20 6 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively ?toshiba?), reserve the right to make changes to the in formation in this document, and related hardware, software a nd systems (collectively ?product?) without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba?s written permission, reproduc tion is permissible only if reproducti on is without alteration/omission. ? though toshiba works continually to improve product?s quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a ma lfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before creating and producing des igns and using, customers mus t also refer to and comply with (a) the latest versions of all re levant toshiba information, including without limitation, this d ocument, the specifications, the data sheets and applic ation notes for product and the precautions and conditions set forth in the ?tosh iba semiconductor reliability handbook? and (b) t he instructions for the application that product will be used with or for. custome rs are solely responsible for all aspects of t heir own product design or applications, incl uding but not limited to (a) determining th e appropriateness of the use of this product in such design or applications; (b) evaluating and det ermining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. toshiba assumes no liability for customers? product design or applications. ? product is intended for use in general el ectronics applications (e.g., computers, personal equipment, office equipment, measur ing equipment, industrial robots and home electroni cs appliances) or for specif ic applications as expre ssly stated in this document . product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality a nd/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or se rious public impact (?unintended use?). unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic s ignaling equipment, equipment used to control combustions or explosions, safety dev ices, elevators and escalato rs, devices related to el ectric power, and equipment used in finance-related fields. do not use product for unintended use unless specifically permitted in thi s document. ? do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy product, whether in whole or in part. ? product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. ? the information contained herein is pres ented only as guidance for product use. no re sponsibility is assumed by toshiba for an y infringement of patents or any other intellectual property rights of third parties that may result from the use of product. no license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. ? a bsent a written signed agreement, except as provid ed in the relevant terms and conditions of sale for product, and to the maximum extent allowable by law, toshiba (1) assumes no liability whatsoever, including without limitation, indirect, co nsequential, special, or incidental damages or loss, including without limitation, loss of profit s, loss of opportunities, business interruption and loss of data, and (2) disclaims any and all express or implied warranties and conditions related to sale, use of product, or information, including warranties or conditions of merchantability, fitness for a particular purpose, accuracy of information, or noninfringement. ? gaas (gallium arsenide) is used in product. gaas is harmful to humans if consumed or absorbed, whether in the form of dust or vapor. handle with care and do not break, cut, crush, grind, dissolve chemically or otherwise expose gaas in product. ? do not use or otherwise make available product or related so ftware or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or m anufacturing of nuclear, chemical , or biological weapons or missi le technology products (mass destruction w eapons). product and related software and technology may be controlled under the japanese foreign exchange and foreign trade law and the u.s. expor t administration regulations. ex port and re-export of product or related software or technology are strictly prohibited exc ept in compliance with all applicable export laws and regulations. ? please contact your toshiba sales representative for details as to environmental matters such as the rohs compatibility of pro duct. please use product in compliance with all applicable laws and regula tions that regulate the inclusion or use of controlled subs tances, including without limitation, the eu rohs directive. toshiba assumes no liability for damages or losses occurring as a result o f noncompliance with applicable laws and regulations.
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